| Tool | Repository |
|---|---|
| MoDesA – Model-Based Design Automation for Zynq PSoCs | Link |
| Chips++ – C-to-Verilog ASIP Generator | Link |
| CHOICE – A Tunable PUF-Design for FPGAs | Link |
| AxPLA: Open library of approximated PLA circuits | Link |
| FAU – Fast Approximate Adder Unit | Link |
| AxSM – Approximate Sequential Multiplier | Link |
For the following tools, please contact the authors.
| Tool | Corresponding Author |
|---|---|
| Reconfiguration Manager | Andreas Becher |
| ReOrder | Andreas Becher |