ReCoNets
Entwurfsmethodik für eingebettete Systeme bestehend aus kleinen Netzwerken hardwarerekonfigurierbarer Knoten und -verbindungen
Modelling: In order to better analyse the system reliability and the fault-tolerance of the system and for a better understanding of the optimizing and synthesis steps, we rely on a graph-based approach to model static applications and static architectures. With the introduction of a graph hierarchy, the model is extended in such a way that, from the application view, it becomes possible to model the time variant load of a system as selection problem of a set or a subset of all possible active processes. With the reconfigurability at different levels (network at the macro level and node at a micro level), the possibility to investigate the hierarchy is given. The configuration of a node for example is represented in such a way that a hierarchy node (cluster) could be chosen as temporal alternative. If we model sensor-, controller- und actuator-processes (a so called Sensor-Controller-Actuator-Chain) through different processes, then it is also possible to distribute those processes to different hardware nodes. The processes can be even migrated at run-time from hardware node to hardware node.
Analysis:
Time-invariant Allocations and Bindings: For static architectures, we define once at compile time the allocation a (which nodes should contain the best architecture for the given application), the binding b (which processes run on a given node?) and the scheduling T (when, respectively in which order and with which priority a process runs on the node to which it was allocated?). Since we consider the case where connections as well as nodes could be defect and the case where nodes or connections can be added to the system, a, b and T will be defined according to the run-time t. Therefore, we will have time parameterized allocations a, bindings b and schedulings T. If an allocated node fails at time t for example, the allocation a(t) has to be changed.
Fault tolerance and reliability analysis of ReCoNets: We consider the two following cases : the first case happens when a connection fails and the second case happens when a node fails. In the first case, the data which were using the failed connection should be routed on another path, if such a path is available in the network. Instead of a using a probabilistic approach (the so-called reliability respectively the fault probability), we try to find out here how many nodes are allowed to fail in the system at the same time? We expect to analyse and to solve this problem using the specification graph’s topology, since the reliability of a system depends on the topology of the specification graph, particularly on the binding possibilities.
Synthesis and Optimization: In order to ensure fault tolerance and thus reliability, there is no central control unit in a ReCoNet to manage the migration of processes. We use a local approach for fault detection and fault reparation when a node or a connection fails or when a node or a connection is added to the system.
Implementation: The methods for detecting faulty connections and nodes as well as the first results on rerouting and online repartitioning should be available and presented as a prototype at the end of 2004. For this purpose, a ReCoNet with four nodes is currently in implementation. A node is an Altera Excalibur board featuring an Apex FPGA with which it is possible to implement a NIOS microprocessor and additionally configure different modules like timer, UARTs, and other interfaces.
Publications
- Haubelt C., Koch D., Reimann F., Streichert T., Teich J.:
ReCoNets-design methodology for embedded systems consisting of small networks of reconfigurable nodes and connections
Springer Netherlands, 2010
ISBN: 9789048134847
DOI: 10.1007/978-90-481-3485-4_11
BibTeX: Download - Platzner M., Teich J., Wehn N.:
Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications
Heidelberg: Springer, 2010
ISBN: 978-90-481-3484-7
DOI: 10.1007/978-90-481-3485-4
BibTeX: Download - Angermeier J., Bobda C., Majer M., Teich J.:
Erlangen slot machine: An FPGA-based dynamically reconfigurable computing platform
Springer Netherlands, 2010
ISBN: 9789048134847
DOI: 10.1007/978-90-481-3485-4_3
BibTeX: Download - Bobda C., Majer M., Teich J., Ahmadinia A.:
The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-Based Computer
In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 47 (2007), p. 15-31
ISSN: 1387-5485
BibTeX: Download - Ahmadinia A., Angermeier J., Fekete SP., Kamphans T., Koch D., Majer M., Schweer N., Teich J., Tessars C., Van Der Veen JC.:
ReCoNodes-optimization methods for module scheduling and placement on reconfigurable hardware devices
Springer Netherlands, 2010
ISBN: 9789048134847
DOI: 10.1007/978-90-481-3485-4_10
BibTeX: Download - Koch D., Beckhoff C., Teich J.:
A Communication Architecture for Complex Runtime Reconfigurable Systems and its Implementation on Spartan-3 FPGAs
17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA'09) (Monterey, California)
In: Proc. 17th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays 2009
BibTeX: Download - Koch D., Beckhoff C., Teich J.:
Minimizing Internal Fragmentation by Fine-grained Two-dimensional Module Placement for Runtime Reconfigurable Systems
17th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'09) (Napa, CA, 5. April 2009 - 7. April 2009)
In: Proc. 17th Annual IEEE Symposium on Field-Programmable Custom Computing Machines 2009
DOI: 10.1109/FCCM.2009.40
BibTeX: Download - Teich J., Beckhoff C., Koch D.:
Hardware decompression techniques for FPGA-based embedded systems
In: ACM Transactions on Reconfigurable Technology and Systems 2 (2009), Article No.: 9
ISSN: 1936-7406
DOI: 10.1145/1534916.1534919
BibTeX: Download - Reimann F., Glaß M., Lukasiewycz M., Keinert J., Haubelt C., Teich J.:
Symbolic voter placement for dependability-aware system synthesis
Embedded Systems Week 2008 - 6th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008 (Atlanta, GA, 19. October 2008 - 24. October 2008)
In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2008
DOI: 10.1145/1450135.1450190
BibTeX: Download - Glaß M., Lukasiewycz M., Reimann F., Haubelt C., Teich J.:
Symbolic reliability analysis of self-healing networked embedded systems
27th International Conference on Computer Safety, Reliability, and Security, SAFECOMP 2008 (Newcastle upon Tyne, 22. September 2008 - 25. September 2008)
In: Proceedings of the 27th International Conference on Computer Safety, Reliability and Security (SAFECOMP 2008) 2008
DOI: 10.1007/978-3-540-87698-4_14
BibTeX: Download - Fekete SP., Kamphans T., Schweer N., Tessars C., Van Der Veen JC., Angermeier J., Koch D., Teich J.:
No-Break Dynamic Defragmentation of Reconfigurable Devices
International Conference on Field-Programmable Logic and Applications (FPL 08) (Heidelberg, 8. September 2008 - 10. September 2008)
In: Proceedings of International Conference on Field-Programmable Logic and Applications, New York: 2008
DOI: 10.1109/FPL.2008.4629917
BibTeX: Download - Beckhoff C., Koch D., Teich J.:
ReCoBus-Builder - A Novel Tool and Technique to Build Statically and Dynamically Reconfigurable Systems for FPGAs
International Conference on Field-Programmable Logic and Applications (FPL 08) (Heidelberg, 8. September 2008 - 10. September 2008)
In: Proceedings of International Conference on Field-Programmable Logic and Applications, New York: 2008
DOI: 10.1109/FPL.2008.4629918
BibTeX: Download - Haubelt C., Koch D., Teich J.:
Efficient reconfigurable on-chip buses for fpgas
16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08 (Palo Alto, California)
In: Proceedings 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2008) 2008
DOI: 10.1109/FCCM.2008.33
BibTeX: Download - Glaß M., Lukasiewycz M., Reimann F., Haubelt C., Teich J.:
Symbolic reliability analysis and optimization of ECU networks
Design, Automation and Test in Europe, DATE 2008 (Munich, 10. April 2008 - 14. April 2008)
In: Proceedings of Design, Automation and Test in Europe (DATE 2008) 2008
DOI: 10.1109/DATE.2008.4484679
BibTeX: Download - Streichert T., Koch D., Haubelt C., Teich J.:
Concepts for self-adaptive and self-healing networked embedded systems
In: Rolf Würtz (ed.): Organic Computing, Springer, 2008, p. 241-260 (Springer Series Understanding Complex Systems)
ISBN: 9783540776567
DOI: 10.1007/978-3-540-77657-4_11
BibTeX: Download - Brendle R., Streichert T., Koch D., Haubelt C., Teich J.:
Dynamic reconfiguration of FlexRay schedules for response time reduction in asynchronous fault-tolerant networks
21st International Conference on Architecture of Computing Systems, ARCS 2008 (Dresden, 25. February 2008 - 28. February 2008)
In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS 2008) 2008
DOI: 10.1007/978-3-540-78153-0_10
BibTeX: Download - Streichert T., Glaß M., Wanka R., Haubelt C., Teich J.:
Topology-aware replica placement in fault-tolerant embedded networks
21st International Conference on Architecture of Computing Systems (ARCS) (Dresden, 25. February 2008 - 28. February 2008)
In: Proc. 21st International Conference on Architecture of Computing Systems (ARCS) 2008
DOI: 10.1007/978-3-540-78153-0_4
URL: http://www12.cs.fau.de/people/rwanka/publications/SGWHT08.php
BibTeX: Download - Koch D., Beckhoff C., Teich J.:
Bitstream Decompression for High Speed FPGA Configuration from Slow Memories
IEEE International Conference on Field-Programmable Technology 2007 (ICFPT'07) (Kokurakita, Kitakyushu, 12. December 2007 - 14. December 2007)
In: Proc. of the IEEE International Conference on Field-Programmable Technology 2007, New York: 2007
DOI: 10.1109/FPT.2007.4439245
BibTeX: Download - Streichert T., Glaß M., Haubelt C., Teich J.:
Design space exploration of reliable networked embedded systems
In: Journal of Systems Architecture 53 (2007), p. 751-763
ISSN: 1383-7621
DOI: 10.1016/j.sysarc.2007.01.005
BibTeX: Download - Koch D., Haubelt C., Streichert T., Teich J.:
Modeling and synthesis of hardware-software morphing
2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 (New Orleans, LA)
In: Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007) 2007
URL: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=34548813114&origin=inward
BibTeX: Download - Dittmann Florian, Rammig Franz, Streubühr Martin, Haubelt Christian, Schallenberg Andreas, Nebel Wolfgang:
Exploration, Partitioning and Simulation of Reconfigurable Systems
In: it - Information Technology 49 (2007), p. 149-156
ISSN: 1611-2776
BibTeX: Download - Streichert T., Strengert C., Koch D., Teich J., Haubelt C.:
Communication Aware Optimization of the Task Binding in Hardware/Software Reconfigurable Networks
In: Journal of Integrated Circuits and Systems (2007), p. 29-36
ISSN: 1807-1953
BibTeX: Download - Koch D., Haubelt C., Teich J.:
Efficient hardware checkpointing: Concepts, overhead analysis, and implementation
FPGA 2007: Fifteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (Monterey, CA, 18. February 2007 - 20. February 2007)
In: Proceedings of the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2007) 2007
DOI: 10.1145/1216919.1216950
BibTeX: Download - Bergmann N., Platzner M., Teich J.:
Dynamically Reconfigurable Architectures
In: EURASIP Journal on Embedded Systems 2007 (2007), p. Article ID 28405, 2 pages
ISSN: 1687-3955
BibTeX: Download - Streichert T., Busse M.:
Time Synchronization
In: Algorithms for Sensor and Ad Hoc Networks, Berlin Heidelberg: Springer, 2007, p. 359-380 (Lecture Notes in Computer Science (LNCS), Vol.4621)
ISBN: 978-3-540-74990-5
URL: http://www.springer.com/computer/communications/book/978-3-540-74990-5
BibTeX: Download - Koch D., Streichert T., Teich J., Haubelt C.:
Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems
In: EURASIP Journal on Embedded Systems 2006 (2006), p. 1 - 15
ISSN: 1687-3955
DOI: 10.1155/ES/2006/42168
BibTeX: Download - Streichert T.:
Placing Functionality in Fault-Tolerant Hardware/Software Reconfigurable Networks
16th International Conference on Field Programmable Logic and Applications (Madrid, 28. August 2006 - 30. August 2006)
In: Proceedings of 16th International Conference on Field Programmable Logic and Applications 2006
DOI: 10.1109/FPL.2006.311346
BibTeX: Download - Streichert T., Strengert C., Haubelt C., Teich J.:
Dynamic task binding for hardware/software reconfigurable networks
SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design (Ouro Preto)
In: In Proceedings of SBCCI 2006 2006
URL: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=33750914830&origin=inward
BibTeX: Download - Streichert T., Haubelt C., Teich J.:
Multi-objective topology optimization for networked embedded systems
2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2006 (Samos, 17. July 2006 - 20. July 2006)
In: Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS 2006) 2006
DOI: 10.1109/ICSAMOS.2006.300814
BibTeX: Download - Koch D., Teich J., Körber M.:
Searching RC5-Keys with Distributed Reconfigurable Computing
International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA ) (Las Vegas, 26. June 2006 - 29. June 2006)
In: Proceedings of International Conference on Engineering of Reconfigurable Systems and Algorithms, USA: 2006
BibTeX: Download - Becker J., Teich J., Athanas P., Brebner G. (ed.):
Dynamically Reconfigurable Architectures
2006
(Proceedings of the Dagstuhl Seminar Nº 06141)
BibTeX: Download - Koch D., Streichert T., Dittrich S., Strengert C., Haubelt C., Teich J.:
An operating system infrastructure for fault-tolerant reconfigurable networks
19th International Conference on Architecture of Computing Systems, ARCS 2006 (Frankfurt, Main, 13. March 2006 - 16. March 2006)
In: Proceedings of the 19th International Conference on Architecture of Computing Systems (ARCS 2006) 2006
DOI: 10.1007/11682127_15
BibTeX: Download - Ahmadinia A., Bobda C., Majer M., Teich J.:
Packet Routing in Dynamically Changing Networks on Chip
12th Reconfigurable Architectures Workshop (RAW 2005) (Denver, 4. April 2005 - 5. April 2005)
In: 2005 (ed.): Proceedings of the 12th Reconfigurable Architectures Workshop (RAW 2005) 2005
BibTeX: Download - Streichert T., Haubelt C., Teich J.:
Distributed HW/SW-partitioning for embedded reconfigurable networks
Design, Automation and Test in Europe, DATE '05 (Munich, 7. March 2005 - 11. March 2005)
In: Proceedings of DATE 2005, Munich 2005
DOI: 10.1109/DATE.2005.123
BibTeX: Download - Streichert T., Haubelt C., Teich J.:
Verteilte HW/SW-Partitionierung für fehlertolerante rekonfigurierbare Netzwerke
17. ITG/GI/GMM Workshop für Testmethoden und Zuverlässigkeit und Fehlertoleranz von Schaltungen und Systemen (Innsbruck, 27. February 2005 - 1. March 2005)
In: Proceedings of 17. ITG/GI/GMM Workshop für Testmethoden und Zuverlässigkeit und Fehlertoleranz von Schaltungen und Systemen 2005
BibTeX: Download - Haubelt C., Otto S., Grabbe C., Teich J.:
A system-level approach to hardware reconfigurable systems
2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 (Shanghai, 18. January 2005 - 21. January 2005)
In: Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC'05) 2005
URL: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=84861440285&origin=inward
BibTeX: Download - Streichert T., Haubelt C., Teich J.:
Online hardware/software partitioning in networked embedded systems
2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 (Shanghai, 18. January 2005 - 21. January 2005)
In: Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC'05) 2005
URL: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=33745634653&origin=inward
BibTeX: Download - Ahmadinia A., Bobda C., Koch D., Majer M., Teich J.:
A Dynamic NoC Approach for Communication in Reconfigurable Devices
International Conference on Field-Programmable Logic and Applications (FPL) (Antwerp, 30. August 2004 - 1. September 2004)
In: Proceedings of International Conference on Field-Programmable Logic and Applications (FPL), London: 2004
BibTeX: Download - Haubelt C.:
Design Space Exploration for Distributed Hardware Reconfigurable Systems
In: Jürgen Becker, Marco Platzner, and Serge Vernalde (ed.): Field-Programmable Logic and Applications, Berlin, Heidelberg: Springer, 2004, p. 1171 (Lecture Notes in Computer Science, Vol.3203)
BibTeX: Download - Haubelt C., Teich J.:
Modeling and Analysis of Distributed Reconfigurable Hardware
Dresdener Arbeitstagung Schaltungs- und Systementwurf (DASS 2004) (Dresden, 19. April 2004 - 20. April 2004)
In: Proc Dresdener Arbeitstagung Schaltungs- und Systementwurf (DASS 2004) 2004
BibTeX: Download - Koch D., Teich J.:
Platform-Independent Methodology for Partial Reconfiguration
ACM Conference Computing Frountiers (CF 04), (Ischia, 14. April 2004 - 16. April 2004)
In: Proceedings of the 2004 ACM conference Computing Frountiers 2004
BibTeX: Download - Haubelt C., Koch D., Teich J.:
ReCoNet: Modeling and implementation of fault tolerant distributed reconfigurable hardware
16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003 (São Paulo, 8. September 2003 - 11. September 2003)
In: Proceedings of the 16th Symposium on Integrated Circuits and Systems Design (SBCCI2003) 2003
DOI: 10.1109/SBCCI.2003.1232851
BibTeX: Download - Feldmann R., Haubelt C., Monien B., Teich J.:
Fault tolerance analysis of distributed reconfigurable systems using SAT-based techniques
13th International Conference on Field Programmable Logic and Applications (Lisbon, 1. September 2003 - 3. September 2003)
In: Proceedings of 13th International Conference on Field Programmable Logic and Applications 2003
URL: https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=35248814417&origin=inward
BibTeX: Download - Haubelt C., Koch D., Teich J.:
Basic OS Support for Distributed Reconfigurable Hardware
Third International Workshop on Systems, Architectures, Modeling and Simulation (SAMOS'03) (Samos, 21. July 2003 - 23. July 2003)
In: Proceedings of the Third International Workshop on Systems, Architectures, Modeling and Simulation (SAMOS'03) 2003
BibTeX: Download