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  4. Reconfigurable Computing

Reconfigurable Computing

In page navigation: Research
  • Groups
    • Approximate Computing
    • Architecture and Compiler Design
    • Effiziente Algorithmen und Kombinatorische Optimierung
    • Reconfigurable Computing
    • System-level Design Automation
  • Projects
    • 2D/3D-Videoüberwachung
    • AEOS
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    • HLESI
    • HYPNOS
    • INI.FAU: Entwurf und Evaluierung hochverfügbarer Ethernet-basierter E/E-Architekturen für latenz- und sicherheitskritische Anwendungen
    • INI.FAU: Integrale Sicherheitsarchitektur – Modellierung, Analyse, Optimierung und Variantenmanagement
    • INI.FAU: Parallelisierung und Ressourcenabschätzung von Algorithmen für heterogene FAS-Architekturen
    • InvasIC: Transregional Collaboriative Research Center 89 — Invasive Computing
      • Basics of Invasive Computing (A01)
      • Central Services of the Transregional Collaborative Research Centre and Public Relations (Z01)
      • Compilation and Code Generation for Invasive Programs (C03)
      • Design-Time Characterisation and Analysis of Invasive Algorithmic Patterns (A04)
      • Invasive NoCs and Memory Hierarchies for Run-Time Adaptive MPSoCs (B05)
      • Invasive Tightly-Coupled Processor Arrays (B02)
      • Simulation invasiver Anwendungen und invasiver Architekturen (C02)
      • Simulative Design Space Exploration (C02)
      • TCPA_INT – Integration and Coupling of Tightly Coupled Processor Arrays (T01)
      • Validation and Demonstrator (Z02)
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Reconfigurable Computing

Contact

Dr.-Ing. Stefan Wildermann

  • Phone number: +49 9131 85-25161
  • Email: stefan.wildermann@fau.de

Prof. Dr.-Ing. Jürgen Teich

  • Phone number: +49 9131 85-25150
  • Email: juergen.teich@fau.de

The Reconfigurable Computing (RC) group investigates reconfigurable, adaptive computing systems that have the ability to dynamically adapt their behavior and structure to changing requirements as well as system and environmental conditions. The goal is the context-aware improvement and guarantee of nonfunctional properties, such as availability of battery-powered embedded systems, throughput in systems for data analysis (big data) and signal processing, as well as real-time properties and security in safety-critical application domains.

We are investigating novel design techniques, architectures, and circuits layouts for modern computer systems, particularly FPGAs, multi-core processors, MPSoCs, and network-on-chips. Based on the expected findings, ideas for new products can be created in the future, like self-reconfiguring or even self-healing, fully autonomous embedded computing systems.

Current research projects

  • AMMOD
  • HYPNOS
  • ReProVide
  • InvasIC: Transregional Collaboriative Research Center 89 — Invasive Computing
    • Basics of Invasive Computing (A01)
    • Design-Time Characterisation and Analysis of Invasive Algorithmic Patterns (A04)
    • Invasive Tightly-Coupled Processor Arrays (B02)
    • Compilation and Code Generation for Invasive Programs (C03)
    • TCPA_INT – Integration und Verbindung von eng gekoppelten Prozessorfeldern (T01)
    • Central Services of the Transregional Collaborative Research Centre and Public Relations (Z01)
    • Validation and Demonstrator (Z02)

Open Source projects

  • LEJOS für den Unterricht
  • rc-openlib

Finished projects

  • 2D/3D-Videoüberwachung
  • DRAQA
  • InvasIC: Transregional Collaboriative Research Center 89 — Invasive Computing
    • Invasive NoCs – autonome, selbst-optimierende Kommunikationsinfrastrukturen für eingebettete Mehrprozessor-Systeme (B05)
  • Organic Bus
  • ReCoNodes
  • ReCoNets
  • ReKoSys
  • SatFPGA
  • SecRec
  • Security Concepts for PSoCs
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