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Approximate Computing

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Approximate Computing

The Approximate Computing (AC) group researches means of sacrificing correctness of computations (i.e., approximating the computations) in favor of gains in non-functional aspects such as less energy consumption, less area consumption, or less latency.

The approximate computing paradigm is based on the fact that many real-world applications do not actually require the highest possible accuracy. They can, in fact, tolerate a certain amount of inaccuracy or even computational errors. The domains that render themselves well for AC are Computer Vision, Machine Learning, Multimedia, Big Data and Gaming. In these domains, approximate computations are sufficient as the human perception is limited to begin with as well as there often already is noise or redundancy in the input data.

The group investigates approximation techniques and approaches on different levels of abstraction. Results on designing specific high-performance circuits for arithmetic operations as well as on approximating whole systems for accelerating artificial neural networks have been obtained.

Current research projects

  • Approximate Computing on FPGAs

Available resources

  • Open library of approximated PLA circuits: AxPLA
  • Open library of approximate adders: FAU
  • Open library of approximate multipliers: AxSM
  • Aarith: An Arbitrary Precision Number Library
  • ABO: BDD-based Error Metric Analysis, Computation and Optimization Framework

 

Publikationen

  • Keszöcze O.:
    BDD-based Error Metric Analysis, Computation and Optimization
    In: IEEE Access 10 (2022), p. 14013 - 14028
    ISSN: 2169-3536
    DOI: 10.1109/ACCESS.2022.3140557
    URL: https://ieeexplore.ieee.org/abstract/document/9669272
    BibTeX: Download
  • Keszöcze O., Brand M., Witterauf M., Heidorn C., Teich J.:
    Aarith: An Arbitrary Precision Number Library
    ACM/SIGAPP Symposium On Applied Computing (virtual conference, 22. March 2021 - 26. March 2021)
    DOI: 10.1145/3412841.3442085
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Teich J.:
    Probabilistic Error Propagation through Approximated Boolean Networks
    57th Annual Design Automation Conference (DAC) (San Francisco, CA, 19. July 2020 - 23. July 2020)
    In: Proceedings of the 57th Annual Design Automation Conference 2020
    BibTeX: Download
  • Wendler A., Keszöcze O.:
    A fast BDD Minimization Framework for Approximate Computing
    Design, Automation and Test in Europe (ALPEXPO, Grenoble, France, 9. March 2020 - 13. March 2020)
    BibTeX: Download
  • Keszöcze O., Kießling M.:
    Approximate Computing Extensions for the Clash HDL Compiler
    Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (virtuelle Konferenz, 18. March 2021 - 19. March 2021)
    BibTeX: Download
  • Keszöcze O., König M., Brand M., Teich J.:
    Error Analysis for Loop Programs using Anytime Instructions in Approximate Computing
    Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (Stuttgart, 19. March 2020 - 20. March 2020)
    BibTeX: Download
  • Schuster A., Heidorn C., Brand M., Keszöcze O., Teich J.:
    Design Space Exploration of Time, Energy, and Error Rate Trade-offs for CNNs using Accuracy-Programmable Instruction Set Processors
    2nd International Workshop on IoT, Edge, and Mobile for Embedded Machine Learning (ITEM) (Virtual Event, 13. September 2021 - 17. September 2021)
    In: Springer, Cham (ed.): Joint European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases (ECML PKDD 2021), Switzerland: 2021
    DOI: 10.1007/978-3-030-93736-2_29
    BibTeX: Download
  • Bosio A., O'Connor I., Traiola M., Echavarria Gutiérrez JA., Teich J., Abdullah Hanif M., Shafique M., Hamdioui S., Deveautour B., Girard P., Virazel A., Bertels K.:
    Emerging Computing Devices: Challenges and Opportunities for Test and Reliability*
    IEEE European Test Symposium (ETS) (Virtual Conference, 24. May 2021 - 28. May 2021)
    In: Proceedings of the 26th IEEE European Test Symposium (ETS) 2021
    DOI: 10.1109/ETS50041.2021.9465409
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Khosravi F., Teich J.:
    An Approximate Sequential Multiplier with Segmented Carry Chain and Variable Accuracy
    AxC20: 5th Workshop on Approximate Computing (San Francisco, CA, 19. July 2020 - 24. July 2020)
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Teich J.:
    Design Space Exploration of Multi-output Logic Function Approximations
    International Conference On Computer Aided Design (ICCAD 2018) (San Diego, CA, 5. November 2018 - 8. November 2018)
    In: Proceedings of the International Conference On Computer Aided Design 2018
    DOI: 10.1145/3240765.3240795
    BibTeX: Download
  • Becher A., Echavarria Gutiérrez JA., Ziener D., Wildermann S., Teich J.:
    A LUT-Based Approximate Adder
    24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2016). (Washington DC, 1. May 2016 - 3. May 2016)
    In: Proceedings of the 24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines 2016
    DOI: 10.1109/FCCM.2016.16
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Teich J.:
    AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs
    International Conference on Field Programmable Technology (FPT 2018) (Naha, Okinawa, 10. December 2018 - 14. December 2018)
    In: Proceedings of 2018 International Conference on Field Programmable Technology 2018
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Teich J.:
    Approximate Logic Synthesis of Very Large Boolean Networks
    Design, Automation and Test in Europe, DATE 2021, February 1-5, 2021 (Alpexpo, Grenoble, 1. February 2021 - 5. February 2021)
    In: Design, Automation and Test in Europe, DATE 2021 2021
    BibTeX: Download
  • Echavarria Gutiérrez JA., Schütz K., Becher A., Wildermann S., Teich J.:
    Can Approximate Computing Reduce Power Consumption on FPGAs?
    25th IEEE International Conference on Electronics Circuits and Systems (Bordeaux, 9. December 2018 - 12. December 2018)
    In: Proceedings of IEEE International Conference on Electronics Circuits and Systems 2018
    BibTeX: Download
  • Echavarria Gutiérrez JA., Schütz K., Becher A., Wildermann S., Teich J.:
    Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs
    AxC18: 3rd Workshop on Approximate Computing (Swissôtel Bremen, 31. May 2018 - 1. June 2018)
    Open Access: https://www12.cs.fau.de/downloads/echavarria/pub/Evaluation_of_Approximate_Computing_Techniques_for_Power_Reduction_on_FPGAs.pdf
    BibTeX: Download
  • Traiola M., Echavarria Gutiérrez JA., Bosio A., Teich J., O'Connor I.:
    Design Space Exploration of an Approximation-Based Fully Reliable TMR Alternative
    8th Prague Embedded Systems Workshop (Horoměřice, 6. November 2020 - 7. November 2020)
    Open Access: https://www12.cs.fau.de/downloads/echavarria/pub/Design_Space_Exploration_of_an_Approximation-Based_Fully_Reliable_TMR_Alternative.pdf
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Becher A., Teich J., Ziener D.:
    FAU: Fast and Error-Optimized Approximate Adder Units on LUT-Based FPGAs
    International Conference on Field Programmable Technology (FPT 2016) (Xi'an, 7. December 2016 - 9. December 2016)
    In: Proceedings of 2016 International Conference on Field Programmable Technology 2016
    DOI: 10.1109/FPT.2016.7929536
    BibTeX: Download
  • Traiola M., Echavarria Gutiérrez JA., Bosio A., Teich J., O'Connor I.:
    Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits
    International Conference On Computer Aided Design (Virtual conference, 1. November 2021 - 4. November 2021)
    In: Proceedings of the International Conference on Computer-Aided Design, ICCAD 2021
    BibTeX: Download
  • Becher A., Echavarria Gutiérrez JA., Ziener D., Teich J.:
    Approximate Adder Structures on FPGAs
    AxC15: 1st Workshop on Approximate Computing (Paderborn, Germany)
    Open Access: https://www12.cs.fau.de/downloads/echavarria/pub/Approximate_Adder_Structures_on_FPGAs.pdf
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Khosravi F., Becher A., Teich J.:
    On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains
    (2021)
    URL: http://arxiv.org/abs/2105.05588
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Potwigin E., Teich J.:
    Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders
    In: IEEE Embedded Systems Letters (2017), Article No.: 99
    ISSN: 1943-0663
    DOI: 10.1109/LES.2017.2760922
    BibTeX: Download
  • Brand M., Witterauf M., Bosio A., Teich J.:
    Anytime Floating-Point Addition and Multiplication – Concepts and Implementations
    Conference on Application-specific Systems, Architectures and Processors (ASAP 2020) (Manchester, U.K., 6. July 2020 - 8. July 2020)
    In: Proceedings of the 31st IEEE International Conference on Application-specific Systems, Architectures and Processors 2020
    DOI: 10.1109/ASAP49362.2020.00034
    BibTeX: Download
  • Echavarria Gutiérrez JA., Wildermann S., Keszöcze O., Khosravi F., Becher A., Teich J.:
    Design and Error Analysis of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains
    In: it - Information Technology (2022)
    ISSN: 1611-2776
    DOI: 10.1515/itit-2021-0040
    BibTeX: Download
  • Echavarria Gutiérrez JA., Keszöcze O., Teich J.:
    Probability-based DSE of Approximated LUT-based FPGA Designs
    15th IEEE Dallas Circuits and Systems Conference (Dallas, 17. June 2022 - 19. June 2022)
    BibTeX: Download
  • Heil A., Keszöcze O.:
    Fast Approximate AIG Synthesis
    International Workshop on Boolean Problems (Bremen, 22. September 2022 - 23. September 2022)
    BibTeX: Download
  • Sommer J., Özkan MA., Keszöcze O., Teich J.:
    Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
    In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 (2022), p. 3767 - 3778
    ISSN: 0278-0070
    DOI: 10.1109/TCAD.2022.3197512
    BibTeX: Download
  • Pradhan C., Letras M., Teich J.:
    Efficient Table-based Function Approximation on FPGAs using Interval Splitting and BRAM Instantiation
    In: ACM Transactions on Embedded Computing Systems (2023)
    ISSN: 1539-9087
    DOI: 10.1145/3580737
    BibTeX: Download
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