Parallele Systeme

Lecturers:

PD Dr.-Ing. F. Hannig, Prof. Dr.-Ing. J. Teich

Module description:

Parallele Systeme (VU) and
Parallele Systeme mit erweiterter Übung (VEU)

Umfang/Stunden:

V2 + Ü2 (together 5 ECTS), with extended exercises (7,5 ECTS)

Place and time of the lecture:

Thursday, 8:30 – 10:00, Room H4

The first lecture will take place on 16.04.2026.

Place and time of the exercises:

English Exercise: Tuesday, 14:15 – 15:45, Room 01.255-128 (Batuhan Sesli)

English Exercise: Thursday, 12:15 – 13:45, Room 01.255-128 (Frank Hannig)

The exercises for the first exercise sheet will take place on 23. and 28.04.2026

Place and time of the extended exercises:

to be announced.

Course (slides, exercises, other files):

All important documents will be available on the StudOn repository.

Content:

Even our personal computers already allow for a high degree of concurrent data processing. However, making efficient use of parallelism requires more than just multiple processors; in particular, the problem to be solved must lend itself to parallel processing. This lecture describes the characteristics of various parallel computer architectures and the metrics used to evaluate them. Furthermore, models and languages for programming parallel computers are introduced. In addition to the programming of general-purpose parallel computers, design methods (CAD) are presented that show how, starting from an algorithmic problem, a massively parallel computing array in VLSI can be derived that calculates precisely this problem in an optimally parallel manner. Such circuits play a dominant role at the bit or word level (arithmetic) as well as in signal and image processing problems (e.g., filters). The following topics are covered in detail:

  1. Theory of parallelism (parallel computer models, parallel specification forms and languages, performance models and calculation)
  2. Classification of parallel and scalable computer architectures (multiprocessors and multicomputers, vector computers, dataflow machines, VLSI arrays)
  3. Programmable System-on-Chip (SoC) architectures
  4. Programming of parallel computers (languages and models, design methods and compilers, optimization)
  5. Massive parallelism: From algorithm to circuit

Literature:

  • Kai Hwang, „Advanced Computer Architecture: Parallelism, Scalability, Programmability“
  • Michael Wolfe, „High Performance Compilers for Parallel Computing“
  • Alain Darte, Yves P. Robert, Frederic Vivien, „Scheduling and Automatic Parallelization“
  • Utpal Banerjee, „Loop Parallelization (VLSI, Computer Architecture and Digital Signal Processing)“
  • S. Y Kung, „VLSI Array Processors“

Contact

PD Dr.-Ing. Frank Hannig

Prof. Dr.-Ing. Jürgen Teich