Approximate Computing on FPGAs
ACoF
Approximate Computing systematically exploits the trade-off between accuracy, power/energy consumption, performance, and cost of many applications of daily life, e.g., computer vision, machine learning, multimedia, big data analysis and gaming. Computing results approximately is a viable approach here thanks to inherent human perceptual limitations, redundancy, or noise in input data.In this project, we want to investigate novel techniques for the design and optimization of approximate logic circuits for FPGA (field-programmable gate array) targets. These devices are known to perfectly combine high performance of hardware designs with the re-programmability of software and are used in many products of daily life and even cloud servers. The goal of our research is a) to investigate novel techniques for function approximation exploiting FPGA artifacts, i.e., DPS blocks and BRAM, b) to study new error metrics and a calculus for error propagation in networks of approximate arithmetic modules, c) to develop novel FPGA-specific optimization techniques for design space exploration and synthesis of approximate multi-output Boolean functions, and d) study how to integrate error modeling and analysis techniques into existing high-level programming languages and subsequent synthesis of approximate Verilog or VHDL designs.
Publikationen
2024
Approximate and Reconfigurable Precision Instruction Set Processors for Tightly Coupled Processor Arrays (Dissertation, 2024)
DOI: 10.25593/open-fau-601
URL: https://open.fau.de/handle/openfau/31038
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SAS - A Framework for Symmetry-based Approximate Synthesis
Design Automation Conference (San Francisco, 23. June 2024 - 27. June 2024)
DOI: 10.1145/3649329.3658495
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DSL-based SNN Accelerator Design using Chisel
27th Euromicro Conference Series on Digital System Design (DSD) (Paris, 27. August 2024 - 30. August 2024)
In: Proceedings of the 27th Euromicro Conference on Digital Systems Design (DSD) 2024
DOI: 10.1109/DSD64264.2024.00032
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SNN vs. CNN Implementations on FPGAs: An Empirical Evaluation
20th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC) (Aveiro, 20. March 2024 - 22. March 2024)
In: Proceedings of the 20th International Symposium on Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC) 2024
DOI: 10.1007/978-3-031-55673-9_1
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Compiler-based Processor Network Generation for Neural Networks on FPGAs
27th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) (Kaiserslautern, 14. February 2024 - 15. February 2024)
In: Proceedings of the 27th Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV) 2024
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2023
Fast Approximate AIG-Based Synthesis
In: Rolf Drechsler, Sebastian Huhn (ed.): Advanced Boolean Techniques, Springer, 2023, p. 17 -- 32
ISBN: 978-3-031-28915-6
DOI: 10.1007/978-3-031-28916-3
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To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations
(2023)
Open Access: https://arxiv.org/abs/2306.12742
URL: https://arxiv.org/abs/2306.12742
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Efficient Table-based Function Approximation on FPGAs using Interval Splitting and BRAM Instantiation
In: ACM Transactions on Embedded Computing Systems 22 (2023), p. 1-24
ISSN: 1539-9087
DOI: 10.1145/3580737
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2022
Precision- and Accuracy-Reconfigurable Processor Architectures—An Overview
In: IEEE Transactions on Circuits and Systems II: Express Briefs 69 (2022), p. 2661 - 2666
ISSN: 1057-7130
DOI: 10.1109/TCSII.2022.3173753
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On the Approximation of Arithmetic Functions and Logic Snythesis of Approximate Very Large Boolean Networks (Dissertation, 2022)
URL: https://opus4.kobv.de/opus4-fau/files/20100/DissertationJorgeEchavarria.pdf
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Probability-based DSE of Approximated LUT-based FPGA Designs
15th IEEE Dallas Circuits and Systems Conference (Dallas, 17. June 2022 - 19. June 2022)
DOI: 10.1109/dcas53974.2022.9845591
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Design and Error Analysis of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains
In: it - Information Technology (2022)
ISSN: 1611-2776
DOI: 10.1515/itit-2021-0040
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Fast Approximate AIG-Based Synthesis
International Workshop on Boolean Problems (Bremen, 22. September 2022 - 23. September 2022)
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BDD-based Error Metric Analysis, Computation and Optimization
In: IEEE Access 10 (2022), p. 14013 - 14028
ISSN: 2169-3536
DOI: 10.1109/ACCESS.2022.3140557
URL: https://ieeexplore.ieee.org/abstract/document/9669272
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Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 (2022), p. 3767 - 3778
ISSN: 0278-0070
DOI: 10.1109/TCAD.2022.3197512
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Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) (Shanghai, 7. October 2022 - 14. October 2022)
DOI: 10.1109/tcad.2022.3197512
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DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks
International Conference on Field Programmable Logic and Applications (FPL) (Belfast, United Kingdom, 29. August 2022 - 2. September 2022)
In: IEEE Proceedings of the 32nd International Conference on Field Programmable Logic and Applications 2022
DOI: 10.1109/FPL57034.2022.00035
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2021
Emerging Computing Devices: Challenges and Opportunities for Test and Reliability*
IEEE European Test Symposium (ETS) (Virtual Conference, 24. May 2021 - 28. May 2021)
In: Proceedings of the 26th IEEE European Test Symposium (ETS) 2021
DOI: 10.1109/ETS50041.2021.9465409
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On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains
(2021)
URL: http://arxiv.org/abs/2105.05588
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Approximate Logic Synthesis of Very Large Boolean Networks
Design, Automation and Test in Europe, DATE 2021, February 1-5, 2021 (Alpexpo, Grenoble, 1. February 2021 - 5. February 2021)
In: Design, Automation and Test in Europe, DATE 2021 2021
DOI: 10.23919/date51398.2021.9473952
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Aarith: An Arbitrary Precision Number Library
ACM/SIGAPP Symposium On Applied Computing (virtual conference, 22. March 2021 - 26. March 2021)
DOI: 10.1145/3412841.3442085
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Approximate Computing Extensions for the Clash HDL Compiler
Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (virtuelle Konferenz, 18. March 2021 - 19. March 2021)
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Design Space Exploration of Time, Energy, and Error Rate Trade-offs for CNNs using Accuracy-Programmable Instruction Set Processors
2nd International Workshop on IoT, Edge, and Mobile for Embedded Machine Learning (ITEM) (Virtual Event, 13. September 2021 - 17. September 2021)
In: Springer, Cham (ed.): Joint European Conference on Machine Learning and Principles and Practice of Knowledge Discovery in Databases (ECML PKDD 2021), Switzerland: 2021
DOI: 10.1007/978-3-030-93736-2_29
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Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits
International Conference On Computer Aided Design (Virtual conference, 1. November 2021 - 4. November 2021)
In: Proceedings of the International Conference on Computer-Aided Design, ICCAD 2021
DOI: 10.1109/iccad51958.2021.9643561
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2020
Anytime Floating-Point Addition and Multiplication – Concepts and Implementations
Conference on Application-specific Systems, Architectures and Processors (ASAP 2020) (Manchester, U.K., 6. July 2020 - 8. July 2020)
In: Proceedings of the 31st IEEE International Conference on Application-specific Systems, Architectures and Processors 2020
DOI: 10.1109/ASAP49362.2020.00034
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An Approximate Sequential Multiplier with Segmented Carry Chain and Variable Accuracy
AxC20: 5th Workshop on Approximate Computing (San Francisco, CA, 19. July 2020 - 24. July 2020)
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Design Space Exploration of an Approximation-Based Fully Reliable TMR Alternative
8th Prague Embedded Systems Workshop (Horoměřice, 6. November 2020 - 7. November 2020)
Open Access: https://www12.cs.fau.de/downloads/echavarria/pub/Design_Space_Exploration_of_an_Approximation-Based_Fully_Reliable_TMR_Alternative.pdf
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A fast BDD Minimization Framework for Approximate Computing
Design, Automation and Test in Europe (ALPEXPO, Grenoble, France, 9. March 2020 - 13. March 2020)
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