Opening Keynote Jürgen Teich at HiPEAC Computing Systems Week, Lyon, France, 25-27 October 2021

Picture of Prof. Teich
Prof. Dr.-Ing. Jürgen Teich

Prof. Dr.-Ing. Jürgen Teich gave the Opening Keynote “Enforcement of Non-functional Program Requirements on MPSoCs” at HiPEAC CSW, October 25-27, 2021, in Lyon. The conference was hosted by the University of Lyonm see for details.


Enforcement of Non-functional Program Requirements on MPSoCs
Prof. Dr.-Ing. Jürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)

Many embedded applications require non-functional requirements such as safety, reliability, and execution time to be guaranteed during the execution of respective programs on modern Multi-Processor System-on-Chip (MPSoC) platforms.

Unfortunately, current compilers and operating systems are not aware of such requirements and thus no able to satisfy, or even counter-productive in satisfying these, e.g., by sharing resources unnecessarily between application programs and thus creating execution interference.

In this talk, we first introduce the concept and principles of Invasive Computing that allows a programmer to claim a set of resources exclusively, e.g., CPU cores, for each application. Importantly, this not only creates an on-demand isolation of elsewise interfering programs, but as a result allows to then apply static analysis and optimization techniques to optimize the deployment of applications on a given MPSoC.

Unfortunately, jitter and variability of non-functional program execution qualities such as, e.g., latency or throughput may still remain to a certain degree due do either exogeneous noise influences such as data-dependent input workload, but also induced currently by MPSoC-internal system management software, e.g., dynamic power management.

As a remedy, we present novel techniques named Run-time Requirement Enforcement (RRE) to support the satisfaction of given non-functional execution requirements for individual applications in tight bounds at run-time. These are based on Enforcement Automata.

These sense the incoming workload variation at run-time while adjusting core and power management in reaction. It is shown that these can be generated and even formally verified statically prior to their deployment for run-time control of a given set of requirements.

For image and other types of streaming applications, we provide intuitive examples that by controlling DVFS settings of invaded CPU cores either pro-actively or re-actively, not only tight execution times, but also power corridors may be strictly enforced, or alternatively the number of violations or return times to satisfaction of requirements minimized.
Picture of a room, where a person holds a talk in front of an auditorium

Picture of a room, where a person holds a talk in front of an auditorium